We are looking for a senior RTL engineer to join our team and work on next-generation Server infrastructure design. You will work with leading Processor and Server companies and help them conceptualize and deliver the new server platforms that will power data centers for the next 10 years. Time-to-time you will work with processors and other hardware that are not publicly released and can not be found on the producer's website.
- Development and/or acceleration of applications on heterogeneous systems such as CPU - FPGA.
- Working on memory optimization based on FPGA technologies to accelerate data center architecture.
- Development of FPGA solutions that interact directly with 100 Gb/s network traffic.
- Consistently delivering high-quality products on time.
- Minimum 5 years of experience in RTL (Verilog, VHDL).
- Vivado environment proficiency (at least 3 years of experience)
- Expert level knowledge of Intel/Altera and/or Xilinx FPGAs is a huge plus
- Expert-level knowledge of Verilog or VHDL (at least 5 years of experience)
- Deep understanding of computer architecture (x86 and Arm), memory architecture, and programming algorithms
- DMA, PCIe.
- Team-oriented but able to carry out activities independently with good communication skills.