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Mid-Level Design Verification Engineer
Yerevan, Armenia

Join the company leading the technological revolution in data center infrastructure. Grovf is a technology company producing groundbreaking 400Gbps network processors that enable cybersecurity, HPC, and storage use cases.
The ASIC Verification Engineer's primary job function is Pre-Silicon Design Verification of Network processor accelerator IPs and SOC designs using industry-standard verification methodologies.
 

 Job Responsibilities:
 

  • Pre-silicon design verification of next-generation Network processor accelerator IPs, SoCs, blocks, and/or chip top-level.

  • Collaborate with other team members to define a verification methodology and a test plan.

  • Develop IP-level verification environments including stimulus generators, monitors, scoreboards, and coverage collectors

  • Build self-checking test benches for SoC blocks and chip top-level verification.

  • Develop a verification plan for IP and SOC features

  • Generate directed and random test cases, write regression scripts, and report code and functional coverage.

  • Develop and grow verification infrastructure to improve verification productivity and regression management.

     

 Required Qualifications:
 

  • BS/MS in Electrical Engineering or related degree or certification required.

  • 1+ years of experience in System Verilog or UVM-based verification

  • Good skills in verification methodology, test planning, and test bench architecture

  • Experience with at least one standard interface and knowledge  to work with standards

  • Ability to read, understand and modify C++, Python, Make and shell code

  • B1 English level is required

  • Ability to communicate in Russian.